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? semiconductor components industries, llc, 2013 january, 2013 ? rev. p0 1 publication order number: NCL30080/d NCL30080 product preview quasi-resonant primary side current-mode controller for led lighting the NCL30080 is a pwm current mode controller targeting isolated flyback and non ? isolated constant current topologies. the controller operates in a quasi ? resonant mode to provide high efficiency. thanks to a novel control method, the device is able to precisely regulate a constant led current from the primary side. this removes the need for secondary side feedback circuitry, biasing and an optocoupler. the device is highly integrated with a minimum number of external components. a wide v cc range simplifies the design process and allows a single design to support a wide led forward voltage range. a robust suite of safety protection is built in to simplify the design. this device is specifically intended for very compact space efficient designs features ? quasi ? resonant peak current ? mode control operation ? primary side sensing (no optocoupler needed) ? wide v cc range ? precise led constant current regulation 1% typical ? line feed ? forward for enhanced regulation accuracy ? low led current ripple ? 250 mv 2% guaranteed voltage reference for current regulation ? ~ 0.9 power factor with valley fill input stage ? low led current ripple ? source 300 ma / sink 500 ma totem pole driver with 12 v gate clamp ? low start ? up current (13 a typ.) ? small space saving low profile package ? wide temperature range of ? 40 to +125 c ? pb ? free, halide ? free msl1 product ? robust protection features ? over voltage / led open circuit protection ? secondary diode short protection ? output short circuit protection ? shorted current sense pin fault detection ? latched and auto ? recoverable versions ? brown ? out ? v cc under voltage lockout ? thermal shutdown typical applications ? integral led bulbs ? led power driver supplies ? led light engines this document contains information on a product under development. on semiconductor reserves the right to change or discontinue this product without notice. http://onsemi.com pin connections see detailed ordering and shipping information in the package dimensions section on page 21 of this data sheet. ordering information tsop ? 6 sn suffix case 318g marking diagram vin vcc drv zcd gnd cs (top view) 1 1 aax = specific device code x = e or f a = assembly location y = year w = work week = pb ? free package aaxayw 1 (note: microdot may be in either location)
NCL30080 http://onsemi.com 2 figure 1. typical application schematic for NCL30080 aux 1 2 34 5 6 . . . table 1. pin function description pin no pin name function pin description 1 zcd zero crossing detection connected to the auxiliary winding; this pin detects the core reset event. 2 gnd ? the controller ground 3 cs current sense this pin monitors the primary peak current 4 drv driver output the current capability of the totem pole gate drive (+0.3/ ? 0.5 a) makes it suit- able to effectively drive a broad range of power mosfets. 5 vcc supplies the controller this pin is connected to an external auxiliary voltage. 6 vin input voltage sensing brown ? out this pin observes the hv rail and is used in valley selection. this pin also monitors and protects for low mains conditions.
NCL30080 http://onsemi.com 3 figure 2. internal circuit architecture zcd zero crossing detection cs winding and output diode short circuit protection max. peak current limit ipkmax wod_scp qdrv vcc management vcc drv internal thermal shutdown management clamp circuit vin brown ? out bo_nok cs_reset stop uvlo off latch stop wod_scp ipkmax bo_nok gnd stop qdrv aux. winding aux_scp aux_scp vcc_max line ipkmax cs short protection cs_shorted cs_shorted short circuit protection protection vcc over voltage fault feedforward leading edge blanking valley selection constant ? current control s r q v vin v vin v ref v vly v vin v vin v dd v ref v cc
NCL30080 http://onsemi.com 4 table 2. maximum ratings table symbol rating value unit v cc(max) i cc(max) maximum power supply voltage, vcc pin, continuous voltage maximum current for vcc pin ? 0.3, +35 internally limited v ma v drv(max) i drv(max) maximum driver pin voltage, drv pin, continuous voltage maximum current for drv pin ? 0.3, v drv (note 1) ? 500, +800 v ma v max i max maximum voltage on low power pins (except pins drv and vcc) current range for low power pins (except pins zcd, drv and vcc) 0.3, +5.5 ? 2, +5 v ma v zcd(max) i zcd(max) maximum voltage for zcd pin maximum current for zcd pin ? 0.3, +10 ? 2, +5 v ma r j ? a thermal resistance, junction ? to ? air 360 c/w t j(max) maximum junction temperature 150 c operating temperature range ? 40 to +125 c storage temperature range ? 60 to +150 c esd capability, hbm model (note 2) 4 kv esd capability, mm model (note 2) 200 v stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. v drv is the drv clamp voltage v drv(high) when v cc is higher than v drv(high) . v drv is v cc unless otherwise noted. 2. this device series contains esd protection and exceeds the following tests: human body model 4000 v per mil ? std ? 883, method 3015. 3. this device contains latch ? up protection and exceeds 100 ma per jedec standard jesd78 except for vin pin which passes 60 ma.
NCL30080 http://onsemi.com 5 table 3. electrical characteristics (unless otherwise noted: for typical values t j = 25 c, v cc = 12 v; for min/max values t j = ? 40 c to +125 c, max t j = 150 c, v cc = 12 v) description test condition symbol min typ max unit startup and supply circuits supply voltage startup threshold minimum operating voltage hysteresis v cc(on) ? v cc(off) internal logic reset v cc increasing v cc decreasing v cc decreasing v cc(on) v cc(off) v cc(hys) v cc(reset) 16 8.2 8 3.5 18 8.8 ? 4.5 20 9.4 ? 5.5 v over voltage protection vcc ovp threshold v cc(ovp) 26 28 30 v v cc(off) noise filter v cc(reset) noise filter ? t vcc(off) t vcc(reset) ? ? 5 20 ? ? s startup current i cc(start) ? 13 30 a startup current in fault mode i cc(sfault) ? 46 60 a supply current device disabled/fault device enabled/no output load on pin 4 device switching (f sw = 65 khz) v cc > v cc(off) f sw = 65 khz c drv = 470 pf, f sw = 65 khz i cc1 i cc2 i cc3 0.8 ? ? 1.0 2.15 2.6 1.4 4.0 5.0 ma current sense maximum internal current limit v ilim 0.95 1 1.05 v leading edge blanking duration for v ilim (t j = ? 25 c to 125 c) t leb 250 300 350 ns leading edge blanking duration for v ilim (t j = ? 40 c to 125 c) t leb 240 300 350 ns input bias current drv high i bias ? 0.02 ? a propagation delay from current detection to gate off ? state t ilim ? 50 150 ns threshold for immediate fault protection activation v cs(stop) 1.35 1.5 1.65 v leading edge blanking duration for v cs(stop) t bcs ? 120 ? ns blanking time for cs to gnd short detection v pinvin = 1 v t cs(blank1) 6 ? 12 s blanking time for cs to gnd short detection v pinvin = 3.3 v t cs(blank2) 2 ? 4 s gate drive drive resistance drv sink drv source r snk r src ? ? 13 30 ? ? drive current capability drv sink (note 4) drv source (note 4) i snk i src ? ? 500 300 ? ? ma rise time (10% to 90%) c drv = 470 pf t r ? 40 ? ns fall time (90% to 10%) c drv = 470 pf t f ? 30 ? ns drv minimum high level v cc = v cc(off) +0.2 v c drv = 470 pf, r drv = 33 k v drv(low) 8 ? ? v drv high clamp level v cc = 30 v c drv = 470 pf, r drv = 33 k v drv(high) 10 12 14 v 4. guaranteed by design
NCL30080 http://onsemi.com 6 table 3. electrical characteristics (unless otherwise noted: for typical values t j = 25 c, v cc = 12 v; for min/max values t j = ? 40 c to +125 c, max t j = 150 c, v cc = 12 v) description unit max typ min symbol test condition zero voltage detection circuit zcd threshold voltage v zcd increasing v zcd(thi) 25 45 65 mv zcd threshold voltage (note 4) v zcd decreasing v zcd(thd) 5 25 45 mv zcd hysteresis (note 4) v zcd(hys) 10 ? ? mv threshold voltage for output short circuit or aux. winding short circuit detection v zcd(short) 0.8 1 1.2 v short circuit detection timer v zcd < v zcd(short) t ovld 70 90 110 ms auto ? recovery timer duration t recovery 3 4 5 s input clamp voltage high state low state i pin1 = 3.0 ma i pin1 = ? 2.0 ma v ch v cl ? ? 0.9 9.5 ? 0.6 ? ? 0.3 v propagation delay from valley detection to drv high v zcd decreasing t dem ? ? 150 ns equivalent time constant for zcd input (note 4) t par ? 20 ? ns blanking delay after on ? time t blank 2.25 3 3.75 s timeout after last demag transition t timo 5 6.5 8 s constant current control reference voltage at t j = 25 c v ref 245 250 255 mv reference voltage t j = ? 40 c to 125 c v ref 242.5 250 257.5 mv current sense lower threshold for detection of the leakage inductance reset time v cs(low) 30 55 80 mv line feed ? forward v vin to i cs(offset) conversion ratio k lff 15 17 19 a/v offset current maximum value v pinvin = 4.5 v i offset(max) 67.5 76.5 85.5 a valley selection threshold for line range detection v in increasing (1 st to 2 nd valley transition for v ref > 0.75 v) v vin increasing v hl 2.28 2.4 2.52 v threshold for line range detection v in decreasing (2 nd to 1 st valley transition for v ref > 0.75 v) v vin decreasing v ll 2.18 2.3 2.42 v blanking time for line range detection t hl(blank) 15 25 35 ms thermal shutdown thermal shutdown (note 4) device switching (f sw around 65 khz) t shdn 130 155 170 c thermal shutdown hysteresis (note 4) t shdn(hys) ? 55 ? c brown ? out brown ? out on level (ic start pulsing) v sd increasing v bo(on) 0.90 1 1.10 v brown ? out off level (ic shuts down) v sd decreasing v bo(off) 0.85 0.9 0.95 v bo comparators delay t bo(delay) ? 30 ? s brown ? out blanking time t bo(blank) 35 50 65 ms brown ? out pin bias current i bo(bias) ? 250 ? 250 na 4. guaranteed by design
NCL30080 http://onsemi.com 7 application information the NCL30080 implements a current ? mode architecture operating in quasi ? resonant mode. thanks to proprietary circuitry, the controller is able to accurately regulate the secondary side current of the flyback converter without using any opto ? coupler or measuring directly the secondary side current. ? quasi ? resonance current ? mode operation: implementing quasi ? resonance operation in peak current ? mode control, the NCL30080 optimizes the efficiency by switching in the valley of the mosfet drain ? source voltage. thanks to a smart control algorithm, the controller locks ? out in a selected valley and remains locked until the input voltage or the output current set point significantly changes. ? primary side constant current control: thanks to a proprietary circuit, the controller is able to compensate for the leakage inductance of the transformer and allow accurate control of the secondary side current. ? line feed ? forward: compensation for possible variation of the output current caused by system slew rate variation. ? open led protection: if the voltage on the vcc pin exceeds an internal limit, the controller shuts down and waits 4 seconds before restarting switching. ? brown ? out: the controller includes a brown ? out circuit with a validation timer which safely stops the controller in the event that the input voltage is too low. the device will automatically restart if the line recovers. ? cycle ? by ? cycle peak curr ent limit: when the current sense voltage exceeds the internal threshold v ilim , the mosfet is turned off for the rest of the switching cycle. ? winding short ? circuit protection: an additional comparator with a short leb filter (t bcs ) senses the cs signal and stops the controller if v cs reaches 1.5 x v ilim . for noise immunity reasons, this comparator is enabled only during the main leb duration t leb . ? output short ? circuit protection: if a very low voltage is applied on zcd pin for 90 ms (nominal), the controllers assume that the output or the zcd pin is shorted to ground and enters shutdown. the auto ? restart version (b suffix) waits 4 seconds, then the controller restarts switching. in the latched version (a suffix), the controller is latched as long as v cc stays above the v cc(reset) threshold.
NCL30080 http://onsemi.com 8 constant current control figure 3 shows the basic circuit of a flyback converter. figure 4 portrays the primary and secondary current of a flyback converter operating in discontinuous conduction mode (dcm). . . drv clamping network transformer figure 3. basic flyback converter schematic c lump r sense v out n sp l p l leak v bulk c clp r clp
NCL30080 http://onsemi.com 9 during the on ? time of the mosfet, the bulk voltage v bulk is applied to the magnetizing and leakage inductors l p and l leak and the current ramps up. when the mosfet is turned ? off, the inductor current first charges c lump . the output diode is off until the voltage across l p reverses and reaches: n sp v out v f (eq. 1) the output diode current increase is limited by the leakage inductor. as a result, the secondary peak current is reduced: i d,pk i l,pk n sp (eq. 2) the diode current reaches its peak when the leakage inductor is reset. thus, in order to accurately regulate the output current, we need to take into account the leakage inductor current. this is accomplished by sensing the clamping network current. practically, a node of the clamp capacitor is connected to r sense instead of the bulk voltage v bulk . then, by monitoring the voltage on the cs pin, we have an image of the primary current (red curve in figure 4). when the diode conducts, the secondary current decreases linearly from i d,pk to zero. when the diode current has turned off, the drain voltage begins to oscillate because of the resonating network formed by the inductors ( l p +l leak ) and the lump capacitor. this voltage is reflected on the auxiliary winding wired in flyback mode. thus, by monitoring the auxiliary winding voltage, we can detect the end of the conduction time of secondary diode. the constant current control block picks up the leakage inductor current, the end of conduction of the output rectifier and controls the drain current to maintain the output current constant. we have: i out v ref 2n sp r sense (eq. 3) the output current value is set by choosing the sense resistor: r sense v ref 2n sp i out (eq. 4) from equation 3, the first key point is that the output current is independent of the inductor value. moreover, the leakage inductance does not influence the output current value as the reset time is processed by the controller. time time figure 4. flyback currents and auxiliary winding voltage in dcm v aux (t) t on t demag t 1 t 2 i sec (t) i pri (t) n sp i d,pk i l,pk
NCL30080 http://onsemi.com 10 internal soft ? start at startup or after recovering from a fault, there is a small internal soft ? start of 40 s. in addition, during startup, as the output voltage is zero volts, the demagnetization time is long and the constant current control block will slowly increase the peak current towards its nominal value as the output voltage grows. figure 5 shows a soft ? start simulation example for a 9 w led driver illustrating a natural soft startup. figure 5. startup simulation showing the natural soft ? start 0 4.00 8.00 12.0 16.0 1 0 200m 400m 600m 800m 2 604u 1.47m 2.34m 3.21m time in seconds 4.07m 0 200m 400m 600m 800m 3 4 i out v cs v out v control (a) (v) (v) cycle ? by ? cycle current limit when the current sense voltage exceeds the internal threshold v ilim , the mosfet is turned off for the rest of the switching cycle (figure 6). winding and output diode short ? circuit protection in parallel with the cycle ? by ? cycle sensing of the cs pin, another comparator with a reduced leb (t bcs ) and a higher threshold (1.5 v typical) is integrated to sense a winding short ? circuit and immediately stops the drv pulses. the controller goes into auto ? recovery mode in version b. in version a, the controller is latched. in latch mode, the drv pulses stop and vcc ramps up and down. the circuit un ? latches when vcc pin voltage drops below v cc(reset) threshold.
NCL30080 http://onsemi.com 11 figure 6. winding short circuit protection, max. peak current limit circuits s r q cs rsense leb1 + ? s r q vcc aux vcc management vdd grand reset drv ipkmax pwmreset vccstop + ? leb2 wod_scp vcontrol + ? stop from fault management block ovp uvlo s r q grand reset ovp 8_hicc off wod_scp latch latch 8_hicc v ilimit v cs(stop) q q q
NCL30080 http://onsemi.com 12 v cc over voltage protection (open led protection) if no output load is connected to the led string fails open circuited, the controller must be able to safely limit the output voltage excursion. in the NCL30080, when the v cc voltage reaches the v cc(ovp) threshold, the controller stops the drv pulses and the 4 ? s timer starts counting. the ic re ? start switching after the 4 ? s timer has elapsed as long as v cc v cc(on) . this is illustrated in figure 7. figure 7. open led protection chronograms 0 10.0 20.0 30.0 40.0 1 0 10.0 20.0 30.0 40.0 2 0 200m 400m 600m 800m 3 1.38 3.96 6.54 9.11 11.7 time in seconds 0 2.00 4.00 6.00 8.00 4 v cc(on) v cc(ovp) v cc(off) v out i out v cc ovp (v) (a) (v) (v)
NCL30080 http://onsemi.com 13 valley lockout quasi ? square wave resonant systems have a wide switching frequency excursion. the switching frequency increases when the output load decreases or when the input voltage increases. the switching frequency of such systems must be limited. the NCL30080 changes the valley as the input voltage increases. this limits the switching frequency excursion. once a valley is selected, the controller stays locked in the valley until the input voltage varies significantly. this avoids valley jumping and the inherent noise caused by this phenomenon. the input voltage is sensed by the vin pin. the internal logic selects the operating valley according to vin pin voltage (line range detection in figure 8). for a universal mains design, the controller operates in the first valley at low line and in the second valley at high line. + ? vbulk vin lline 25 ? ms blanking time hline 2.4 v if lline low 2.3 v if lline high figure 8. line range detection table 4. valley selection vin pin voltage for valley change v vin decreases 0 ? ll ? 2.3 v ? hl ? 5 v valley number 1 st 2 nd 0 ? ll ? 2.4 v ? hl ? 5 v v vin increases vin pin voltage for valley change
NCL30080 http://onsemi.com 14 zero crossing detection block the zcd pin detects when the drain-source voltage of the power mosfet reaches a valley. a valley is detected when the voltage on pin 1 crosses below the v zcd(thd) internal threshold. at startup or in case of extremely damped free oscillations, the zcd comparator may not be able to detect the valleys. to avoid such a situation, the NCL30080 features a time-out circuit that generates pulses if the voltage on zcd pin stays below the v zcd(thd) threshold for 6.5 s (nominal). the time-out also acts as a substitute clock for the valley detection and simulates a missing valley in case of very damped free oscillations. figure 9. time ? out chronograms 4 3 14 12 15 16 17 low high clk timeout low high low high low high zcd comp 2nd, v zcd the 3rd valley is not detected by the zcd comp time ? out circuit adds a pulse to account for the missing 3rd valley the 2nd valley is detected by the zcd comparator v zcd(thd) the 3rd valley is validated 3rd normally with this type of time ? out function, in the event the zcd pin or the auxiliary winding is shorted, the controller could continue switching leading to improper regulation of the led current. moreover during an output short circuit, the controller will strive to maintain constant current operation. to avoid these scenarios, a protection circuit consisting of a comparator and secondary timer starts counting when the zcd voltage is below the v zcd(short) threshold. if this timer reaches 90 ms, the controller detects a fault and shutdown. the auto ? restart version (b suffix) waits 4 seconds, then the controller restarts switching. in the latched version (a suffix), the controller is latched as long as v cc stays above the v cc(reset) threshold.
NCL30080 http://onsemi.com 15 line feed ? forward because of internal and external propagation delays, the mosfet is not turned ? off immediately when the current set ? point is reached. as a result, the primary peak current is slightly higher than expected resulting in a small output current error which can be compensated for during component selection. normally this error would increase if the input line voltage increased because the slew rate through the primary inductance would increase. to compensate for the peak current increase brought by the variation, a positive voltage proportional to the line voltage is added to the current sense signal. the amount of offset voltage can be adjusted using the r lff resistor as shown in figure 10. v cs(offset) k lff v pinvin r cs (eq. 5) the offset voltage is applied only during the mosfet on ? time. bulk rail vin cs q_drv figure 10. line feed ? forward schematic v dd i cs(offset) r cs r sense brown ? out in order to protect the supply against a very low input voltage, the NCL30080 features a brown ? out circuit with a fixed on/off threshold. the controller is allowed to start if a voltage higher than 1 v is applied to the vin pin and shuts ? down if the vin pin voltage decreases and stays below 0.9 v for 50 ms nominal. exiting a brown ? out condition overrides the hiccup on v cc (v cc does not wait to reach v cc(off) ) and the ic immediately goes into startup mode (i cc = i cc(start) ). note for most compact led driver applications, if a true line dropout occurs, the energy in the input bulk capacitor will be discharged and the led load will turn off before the 50 ms timer expires. + ? vbulk vin bo_nok 50 ? ms blanking time 1 v if bonok high 0.9 v if bonok low figure 11. brown ? out circuit
NCL30080 http://onsemi.com 16 figure 12. brown ? out chronograms (valley fill circuit is used) 0 40.0 80.0 120 160 1 10.0 12.0 14.0 16.0 18.0 2 300m 500m 700m 900m 1.10 3 46.1m 138m 231m 323m 415m time in seconds 0 2.00 4.00 6.00 8.00 4 v cc v bulk v pinvin bo_nok (v) (v) (v) (v) bo_nok low => startup mode 50 ? ms timer v bo(on) v bo(off) v cc(on) v cc(off)
NCL30080 http://onsemi.com 17 cs pin short circuit protection with a traditional controller, if the cs pin or the sense resistor is shorted to ground, the driver will not be able to turn off, leading to potential damage of the power supply. to avoid this, the NCL30080 features a circuit to protect the power supply against a short circuit of the cs pin. when the mosfet is on, if the cs voltage stays below v cs(low) after the adaptive blanking timer has elapsed, the controller shuts down and will attempt to restart on the next v cc hiccup. + ? cs q_drv cs_short s r q uvlo bo_nok adaptative blanking time figure 13. cs pin short circuit protection schematic q v cs(low) v vin fault management off mode the circuit turns off whenever a major condition prevents it from operating: ? incorrect feeding of the circuit: ?uvlo high?. the uvlo signal becomes high when v cc drops below v cc(off) and remains high until v cc exceeds v cc(on) . ? v cc ovp ? output diode short circuit protection: ?wod_scp high? ? output / auxiliary winding short circuit protection: ?aux_scp high? ? die over temperature (tsd) ? brown ? out: ?bo_nok? high ? pin cs short circuited to gnd: ?cs_short high? in this mode, the drv pulses are stopped. v cc voltage decrease through the controller own consumption (i cc1 ). for the output diode short circuit protection, the output / aux. winding short circuit protection and the v cc ovp, the controller waits 4 seconds (auto ? recovery timer) and then initiates a startup sequence (v cc v cc(on) ) before re ? starting switching. latch mode this mode is activated by the output diode short ? circuit protection (wod_scp) and the aux_scp in version a only. in this mode, the drv pulses are stopped and the controller is latched. there are hiccups on v cc . the circuit un ? latches when v cc < v cc(reset) .
NCL30080 http://onsemi.com 18 reset stop 4 ? s timer run bo_nok high or tsd or cs_short wod_scp or aux_scp timer has finished counting bo_nok high or tsd or cs_short figure 14. state diagram for b version faults or v cc _ovp v cc > v cc(on) v cc < v cc(off) v cc disch. v cc < v cc(off) or bo_nok v cc _ovp with states : reset stop run v cc disch. 4 ? s timer controller is reset, i cc = i cc(start) controller is on, drv is not switching normal switching no switching, i cc = i cc1 , waiting for v cc to decrease to v cc(off) the auto ? recovery timer is counting, v cc is ramping up and down between v cc(on) and v cc(off)
NCL30080 http://onsemi.com 19 figure 15. state diagram for a version faults with states : reset stop run v cc disch. 4 ? s timer latch controller is reset, i cc = i cc(start) controller is on, drv is not switching normal switching no switching, i cc = i cc1 , waiting for v cc to decrease to v cc(off) the auto ? recovery timer is counting, v cc is ramping up and down between v cc(on) and v cc(off) controller is latched off, v cc is ramping up and down between v cc(on) and v cc(off) , only v cc(reset) can release the latch. reset stop 4 ? s timer run bo_nok high or tsd or cs_short latch wod_scp or aux_scp timer has finished counting bo_nok high or tsd or cs_short v cc > v cc(on) v cc < v cc(off) v cc disch. v cc < v cc(off) or bo_nok v cc _ovp v cc < v cc(reset) v cc _ovp
NCL30080 http://onsemi.com 20 package dimensions ? 6 case 318g ? 02 issue v 23 4 5 6 d 1 e b e1 a1 a 0.05 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. maximum lead thickness includes lead finish. minimum lead thickness is the minimum thickness of base material. 4. dimensions d and e1 do not include mold flash, protrusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.15 per side. dimensions d and e1 are determined at datum h. 5. pin one indicator must be located in the indicated zone. c *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* dim a min nom max millimeters 0.90 1.00 1.10 a1 0.01 0.06 0.10 b 0.25 0.38 0.50 c 0.10 0.18 0.26 d 2.90 3.00 3.10 e 2.50 2.75 3.00 e 0.85 0.95 1.05 l 0.20 0.40 0.60 0.25 bsc l2 ? 0 1 0 1.30 1.50 1.70 e1 e recommended note 5 l c m h l2 seating plane gauge plane detail z detail z 0.60 6x 3.20 0.95 6x 0.95 pitch dimensions: millimeters m
NCL30080 http://onsemi.com 21 options controller output scp winding/output diode scp NCL30080a latched latched NCL30080b auto ? recovery auto ? recovery ordering information device package marking package type shipping ? NCL30080asnt1g aae tsop ? 6 (pb ? free, halide ? free) 3000 / tape & reel NCL30080bsnt1g aaf tsop ? 6 (pb ? free, halide ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 NCL30080/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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